Fairchild Semiconductor Electronic Components Datasheet



FDMS3660AS

MOSFET


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FDMS3660AS
PowerTrench® Power Stage
Asymmetric Dual N-Channel MOSFET
Features
Q1: N-Channel
„ Max rDS(on) = 8 mΩ at VGS = 10 V, ID = 13 A
„ Max rDS(on) = 11 mΩ at VGS = 4.5 V, ID = 11 A
Q2: N-Channel
„ Max rDS(on) = 1.8 mΩ at VGS = 10 V, ID = 30 A
„ Max rDS(on) = 2.2 mΩ at VGS = 4.5 V, ID = 27 A
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
„ RoHS Compliant
July 2013
General Description
This device includes two specialized N-Channel MOSFETs in a
dual PQFN package. The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
SyncFETTM (Q2) have been designed to provide optimal power
efficiency.
Applications
„ Computing
„ Communications
„ General Purpose Point of Load
„ Notebook VCORE
Pin 1
Pin 1
G1
D1
D1
D1
D1
S2 5
Q2
4 D1
PHASE
S2 6
PHASE
3 D1
(S1/D2)
G2
S2 7
2 D1
S2
S2
S2
G2 8
Q1 1 G1
Top Bottom
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
(Note 3)
TC = 25 °C
TA = 25 °C
(Note 4)
TA = 25 °C
TA = 25 °C
Q1 Q2
30 30
±20 ±12
56
131a
130
301b
70
735
2.21a
1.01c
140
1506
2.51b
1.01d
-55 to +150
Units
V
V
A
mJ
W
°C
571a
1251c
3.5
501b
1201d
2.2
°C/W
Device Marking
27CF
32CD
Device
FDMS3660AS
Package
Power 56
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
1
www.fairchildsemi.com


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Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ID = 1 mA, VGS = 0 V
Q1 30
Q2 30
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
Q1
Q2
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
Q1
Q2
Gate to Source Leakage Current
VGS = 20 V, VDS= 0 V
VGS = 12 V, VDS= 0 V
Q1
Q2
V
16
29
mV/°C
1 μA
500 μA
100 nA
100 nA
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1 mA
Q1 1.1 2.0
Q2 1.2 1.5
2.7
2.5
V
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
Q1
Q2
-6
-3
mV/°C
VGS = 10 V, ID = 13 A
VGS = 4.5 V, ID = 11 A
VGS = 10 V, ID = 13 A , TJ = 125 °C
VGS = 10 V, ID = 30 A
VGS = 4.5 V, ID = 27 A
VGS = 10 V, ID = 30 A , TJ = 125 °C
Q1
Q2
5.9 8
8.5 11
7.9
1.2
11
1.8
mΩ
1.5 2.2
1.8 2.7
VDS = 5 V, ID = 13 A
VDS = 5 V, ID = 30 A
Q1 173
Q2 240
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
Rg Gate Resistance
Q1:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q2:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
Q1
Q2
Q1
Q2
1485
4150
397
1195
37
117
2230
6225
595
1795
70
245
pF
pF
pF
Q1 0.1 1.6 3.2
Q2 0.1 1.0 2.0
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr Rise Time
td(off)
Turn-Off Delay Time
tf Fall Time
Qg Total Gate Charge
Qg Total Gate Charge
Qgs Gate to Source Gate Charge
Qgd Gate to Drain “Miller” Charge
Q1:
VDD = 15 V, ID = 13 A, RGEN = 6 Ω
Q2:
VDD = 15 V, ID = 30 A, RGEN = 6 Ω
VGS = 0 V to 10 V Q1:
VDD = 15 V,
VGS = 0 V to 4.5 V ID = 13 A
Q2:
VDD = 15 V,
ID = 30 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
9
12
17
22
ns
3
5
10
10
ns
21
38
33
60
ns
3
5
10
10
ns
21
64
30
90
nC
10
30
13
43
nC
4.5
9
nC
2.0
9
nC
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
2
www.fairchildsemi.com


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Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Drain-Source Diode Characteristics
VSD
trr
Qrr
Notes:
VGS = 0 V, IS = 13 A
Source to Drain Diode
Forward Voltage
VGS = 0 V, IS = 2 A
VGS = 0 V, IS = 30 A
VGS = 0 V, IS = 2 A
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Reverse Recovery Time
Reverse Recovery Charge
Q1:
IF = 13 A, di/dt = 100 A/μs
Q2:
IF = 30 A, di/dt = 300 A/μs
Q1
Q1
Q2
Q2
Q1
Q2
Q1
Q2
0.84
0.74
0.77
0.48
1.2
1.2
1.2
1.2
25 40
33 53
9 18
41 66
V
ns
nC
1.RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 57 °C/W when mounted on
a 1 in2 pad of 2 oz copper
b. 50 °C/W when mounted on
a 1 in2 pad of 2 oz copper
c. 125 °C/W when mounted on a
minimum pad of 2 oz copper
d. 120 °C/W when mounted on a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied with the negative Vgs rating.
4. Pulsed Id limited by junction temperature, td<=100 μS, please refer to SOA curve for more details.
5.
6.
EAS
EAS
of
of
71350mmJJisisbbaaseseddoonnstsatartrintinggTTJ J==2525oCoC; ;NN-c-hch: :LL==33mmHH, I,AISAS==71A0,
VDD = 30 V,
A, VDD = 30
VGS = 10 V.
V, VGS = 10
100% test at
V. 100% test
L= 0.1 mH, IAS = 23 A.
at L= 0.1 mH, IAS = 31
A.
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
3
www.fairchildsemi.com


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Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
70
VGS = 10 V
VGS = 6 V
56 VGS = 4.5 V
42
VGS = 4 V
28
14
0
0.0
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.5 1.0 1.5 2.0 2.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
3.0
Figure 1. On Region Characteristics
6.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
4.5
VGS = 3.5 V
VGS = 4 V
3.0
VGS = 4.5 V
1.5
0.0
0
VGS = 6 V VGS = 10 V
14 28 42
ID, DRAIN CURRENT (A)
56
70
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.5
1.4
ID = 13 A
VGS = 10 V
1.3
1.2
1.1
1.0
0.9
0.8
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On Resistance
vs Junction Temperature
30
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
24
ID = 13 A
18
12
TJ = 125 oC
6
TJ = 25 oC
0
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
70
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
56
VDS = 5 V
42
TJ = 150 oC
28
TJ = 25 oC
14
TJ = -55 oC
0
1234
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
5
70
VGS = 0 V
10
TJ = 150 oC
1
0.1
TJ = 25 oC
0.01
TJ = -55 oC
0.001
0.0
0.2 0.4 0.6 0.8 1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
1.2
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
4
www.fairchildsemi.com


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Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
10
ID = 13 A
8
6
4
VDD = 10 V
VDD = 15 V
VDD = 20 V
2
0
0 6 12 18 24
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
5000
1000
Ciss
Coss
100
Crss
f = 1 MHz
VGS = 0 V
10
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. Capacitance vsDrain
to Source Voltage
30
50
TJ = 100 oC
10
TJ = 125 oC
TJ = 25 oC
1
0.001
0.01 0.1
1
10
tAV, TIME IN AVALANCHE (ms)
Figure9. UnclampedInductive
Switching Capability
100
100
100 μs
10
1 THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
0.1 TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
0.01
0.01 0.1
CURVE BENT TO
MEASURED DATA
1 10
1 ms
10 ms
100 ms
1s
10 s
DC
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
5
60
48 VGS = 10 V
36
VGS = 4.5 V
24
12
RθJC = 3.5 oC/W
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
150
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
1000
100
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
10
1
0.1
10-4 10-3 10-2 10-1 100 101 100 1000
t, PULSE WIDTH (sec)
Figure 12. Single Pulse Maximum
Power Dissipation
www.fairchildsemi.com


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Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
SINGLE PULSE
RθJA = 125 oC/W
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
0.001
10-4
10-3
10-2
10-1
100
101
100
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
1000
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
6
www.fairchildsemi.com


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Typical Characteristics (Q2 N-Channel) TJ = 25 oC unlenss otherwise noted
140
VGS = 10 V
VGS = 4.5 V
105
VGS = 3.5 V
70 VGS = 3 V
VGS = 2.5 V
35
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0 0.2 0.4 0.6 0.8 1.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 14. On-Region Characteristics
6.0
VGS = 2.5 V
4.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3.0
VGS = 3 V
VGS = 3.5 V
1.5
0.0
0
VGS = 4.5 V VGS = 10 V
20 40 60 80 100 120 140
ID, DRAIN CURRENT (A)
Figure 15. Normalized on-Resistance vs Drain
Current and Gate Voltage
1.6
1.5 ID = 30 A
VGS = 10 V
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 16. Normalized On-Resistance
vs Junction Temperature
8
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
6
ID = 30 A
4
TJ = 125 oC
2
TJ = 25 oC
0
2468
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
10
140
VDS = 5 V
105
TJ = 125 oC
TJ = 25 oC
70
35
0
1
TJ = -55 oC
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
23
VGS, GATE TO SOURCE VOLTAGE (V)
4
Figure 18. Transfer Characteristics
200
100 VGS = 0 V
10
1
0.1
0.01
TJ = 125 oC
TJ = 25 oC
TJ = -55 oC
0.001
0.0
0.2 0.4 0.6 0.8
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
1.0
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
7
www.fairchildsemi.com


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Typical Characteristics (Q2 N-Channel) TJ = 25 oC unless otherwise noted
10
ID = 30 A
8
6
4
VDD = 10 V
VDD = 15 V
VDD = 20 V
2
0
0 14 28 42 56 70
Qg, GATE CHARGE (nC)
Figure 20. Gate Charge Characteristics
10000
1000
Ciss
Coss
Crss
100
f = 1 MHz
VGS = 0 V
10
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 21. Capacitance vs Drain
to Source Voltage
30
50
TJ = 100 oC
10
TJ = 125 oC
TJ = 25 oC
1
0.001
0.01 0.1
1
10
tAV, TIME IN AVALANCHE (ms)
100
Figure 22. Unclamped Inductive
Switching Capability
200
100 100 μs
10
1 THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
0.1 TJ = MAX RATED
RθJA = 120 oC/W
TA = 25 oC
0.01
0.01 0.1
CURVE BENT TO
MEASURED DATA
1 10
1 ms
10 ms
100 ms
1s
10 s
DC
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
160
128
VGS = 10 V
96
VGS = 4.5 V
64
32
RθJC = 2.2 oC/W
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
150
Figure 23. Maximun Continuous Drain
Current vs Case Temperature
10000
1000
SINGLE PULSE
RθJA = 120 oC/W
TA = 25 oC
100
10
1
0.1
10-4 10-3 10-2 10-1 100 101 100 1000
t, PULSE WIDTH (sec)
Figure 25. Single Pulse Maximum
Power Dissipation
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
8
www.fairchildsemi.com


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Typical Characteristics (Q2 N-Channel) TJ = 25 oC unless otherwise noted
2
1 DUTY CYCLE-DESCENDING ORDER
0.1
0.01
0.001
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.0001
10-4
10-3
PDM
SINGLE PULSE
RθJA = 120 oC/W
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
10-2 10-1 100 101
t, RECTANGULAR PULSE DURATION (sec)
100
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
1000
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
9
www.fairchildsemi.com


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Typical Characteristics (continued)
SyncFETTM Schottky body diode
Characteristics
Fairchild’s SyncFETTM process embeds a Schottky diode in
parallel with PowerTrench MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 27 shows the reverse recovery
characteristic of the FDMS3660AS.
Schottky barrier diodes exhibit significant leakage at high tem-
perature and high reverse voltage. This will increase the power
in the device.
35
30
25
20
15
10
5
0
-5
100 150 200 250 300 350 400 450 500
TIME (ns)
Figure 27. FDMS3660AS SyncFETTM Body
Diode Reverse Recovery Characteristic
10-2
TJ = 125 oC
10-3
TJ = 100 oC
10-4
10-5
10-6
0
TJ = 25 oC
5 10 15 20 25
VDS, REVERSE VOLTAGE (V)
30
Figure 28. SyncFETTM Body Diode Reverse
Leakage Versus Drain-Source Voltage
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
10
www.fairchildsemi.com


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0.10 C
(2X)
8
5.10
4.90
PKG
CL
5
PKG CL
PIN # 1
INDICATOR
14
TOP VIEW
A
B
6.25
5.90
0.10 C
(2X)
0.63
2.15
4.16
2.13
0.63
4.00
CL
8 76
12 3
0.59
3.18
5.10
1.27 TYP
0.65 TYP
5
2.52
1.60
KEEP OUT AREA
0.00 CL
1.21
2.31
4 3.15
SEE
DETAIL A
RECOMMENDED LAND PATTERN
FOR SAWN / PUNCHED TYPE
SIDE VIEW
0.45
0.25
(6X)
0.65
0.38
1
3.16
2.80
23
0.10
0.05
0.70
0.36
CAB
C
4 1.34
1.12
4.08
3.70
0.66±.05
2.25
2.05
0.65 8
0.38
0.44
0.24
76
1.27
3.81
1.02
5 0.82
0.61
0.31
(8X)
BOTTOM VIEW
0.10 C
8X
0.08 C
1.10
0.90
0.35
0.15
0.05
0.00
C
SEATING
PLANE
(SCALE: 2X)


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0.10 C
(2X)
8
5.10
4.90
PKG
CL
5
PKG CL
6.25
5.90
SEE
DETAIL B
5.90
5.70
0.28
0.08
0.35
0.15
10°
14
0.41
0.21
(8X)
TOP VIEW
0.10 C
(2X)
(SCALE: 2X)
5.00
4.80
SIDE VIEW
SEE
DETAIL C
0.10 C
8X
0.08 C
1.10
0.90
(SCALE: 2X)
0.35
0.15
C
SEATING
PLANE
0.45
0.25
(6X)
0.65
0.38
1
3.16
2.80
23
0.70
0.36
0.10
0.05
4 1.34
1.12
4.08
3.70
0.66±.05
2.25
2.05
0.65
0.38
0.44
0.24
1.02
8 7 6 5 0.82
1.27
0.61
0.31
(8X)
3.81
BOTTOM VIEW
CAB
C
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACKAGE STANDARD REFERENCE:
JEDEC REGISTRATION, MO-240, VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS OR
MOLD FLASH. MOLD FLASH OR BURRS DOES
NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-1994.
E) IT IS RECOMMENDED TO HAVE NO TRACES
OR VIAS WITHIN THE KEEP OUT AREA.
F) DRAWING FILE NAME: PQFN08EREV6.
G) FAIRCHILD SEMICONDUCTOR


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