FDMS3686S Datasheet PDF
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FDMS3686S
PowerTrench® Power Stage
Asymmetric Dual N-Channel MOSFET
Features
Q1: N-Channel
„ Max rDS(on) = 8 mΩ at VGS = 10 V, ID = 13 A
„ Max rDS(on) = 11 mΩ at VGS = 4.5 V, ID = 11 A
Q2: N-Channel
„ Max rDS(on) = 2.8 mΩ at VGS = 10 V, ID = 23 A
„ Max rDS(on) = 3.8 mΩ at VGS = 4.5 V, ID = 21 A
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
„ RoHS Compliant
January 2012
General Description
This device includes two specialized N-Channel MOSFETs in a
dual PQFN package. The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
SyncFET (Q2) have been designed to provide optimal power
efficiency.
Applications
„ Computing
„ Communications
„ General Purpose Point of Load
„ Notebook VCORE
G1 D1 D1 D1
D1
PHASE
(S1/D2)
G2S2
S2 S2
Top
Power 56
Bottom
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 3)
TC = 25 °C
TC = 25 °C
TA = 25 °C
TA = 25 °C
TA = 25 °C
Q1 Q2
30 30
±20 ±20
30 55
54
131a
123
231b
40
404
2.21a
1.01c
100
604
2.51b
1.01d
-55 to +150
Units
V
V
A
mJ
W
°C
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
571a
1251c
3.5
501b
1201d
2.0
°C/W
Device Marking
22CA
F10CC
Device
FDMS3686S
©2012 Fairchild Semiconductor Corporation
FDMS3686S Rev.C1
Package
Power 56
1
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com

Total : 16 Pages
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