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xr
JANAUARY 2005
PRELIMINARY
XRK79892
REV. P1.0.1
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
phase/frequency alignment will occur with minimal output phase disturbance. The typical phase bump caused by a failed clock is eliminated. FEATURES
GENERAL DESCRIPTION
The XRK79892 is a PLL clock driver designed specifically for redund...
