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WARP11

STMicroelectronics

WEIGHT ASSOCIATIVE RULE PROCESSOR

W.A.R.P. 1.1 WEIGHT ASSOCIATIVE RULE PROCESSOR ADVANCED DATA High Speed Rules Processing Antecedent Membership Function...


STMicroelectronics

WARP11

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Description
W.A.R.P. 1.1 WEIGHT ASSOCIATIVE RULE PROCESSOR ADVANCED DATA High Speed Rules Processing Antecedent Membership Functions with any Shape Up to 256 Rules (4 Antecedents,1 Consequent) Up to 16 Input Configurable Variables Up to 16 Membership Functions for an Input Variable Up to 16 Output Variables Up to 128 Membership Functions for all Consequents MAX-DOT Inference Method Defuzzification on chip Software Tools and Emulators Availability 100-pin CPGA100 Ceramic Package 84-lead Plastic Leaded Chip Carrier package GENERAL DESCRIPTION W.A.R.P. is a VLSI Fuzzy Logic controller whose architecture arises from the need of realizing an integrated structure with high inferencing performances and flexibility. To get those results a modular architecture based on a set of parallel memory blocks has been implemented. In order to obtainhigh performances W.A.R.P. uses different data representations during the various phases of the computational cycle, so that it is always operating on the optimal data representation. A vectorial characterization has been adopted for the Antecedent Membership Functions. W.A.R.P. exploits a SGS-THOMSON patented strategy to store the AntecedentMembership Table 1. W.A.R.P. Configuration Settings Number of Inputs Standard Rule Format Rules Number Antecedent’s MFs Number Consequent’s MFs Number Input Data Resolution Output Data Resolution Configurable [1..8] 4 Antecedents, 1 Consequent [or subsets] Max 256 Rules in the 4 Antecedent, 1 Consequent format Configurable...




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