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VSC9186 Datasheet

Part Number VSC9186
Manufacturers Vitesse Semiconductor
Logo Vitesse Semiconductor
Description Telecomm / Datacomm
Datasheet VSC9186 DatasheetVSC9186 Datasheet (PDF)

TIMESTREAMTM PRODUCT FAMILY VSC9186 VSC9186 Killington - Quad STS-48/STM-16 and STS-192/STM-64 Line Interface S P E C I F I C AT I O N S : 2.5V I/O and 1.8V Core Power Supplies 0.18µ CMOS Technology 720-pin CCGA /1.0mm Column Pitch 10W Maximum Power Consumption SPLITTER/COMBINER MODE (DWDM): Four independently-timed 2.5Gb/s SONET/SDH signals are received, terminated, and monitored at the line level. They are pointer processed to the local time domain, passed through an STS-1 level crossco.

  VSC9186   VSC9186






Part Number VSC9187
Manufacturers Vitesse Semiconductor
Logo Vitesse Semiconductor
Description Telecomm / Datacomm
Datasheet VSC9186 DatasheetVSC9187 Datasheet (PDF)

TIMESTREAMTM PRODUCT FAMILY VSC9187 VSC9187 Bromley - 3045 x 3045 VT1.5 TSI Switch Fabric Compliant with SONET Requirements as Stated in ANSI T1.105 and Bellcore GR-253-CORE Facilitates Hardware Based UPSR Switching in Accordance with Telcordia GR-1400-CORE Thermally Enhanced 360 CCGA Package IEEE P1149.1 Test Access Port S P E C I F I C AT I O N S : F E AT U R E S : 3024x3024 (5 G) Non-Blocking VT1.5 TSI, 6048x6048 (10 Gb/s) VT1.5 TSI with 2:1 UPSR Input Pre-selection 2x9x622 Mb/s STS-1.

  VSC9186   VSC9186







Part Number VSC9182
Manufacturers Vitesse Semiconductor
Logo Vitesse Semiconductor
Description Telecomm / Datacomm
Datasheet VSC9186 DatasheetVSC9182 Datasheet (PDF)

PHYSICAL LAYER PRODUCT TIMESTREAM® PRODUCT FAMILY VSC9182 VSC9182 - 40G STS-1 Time Slot Interchange Output Backplane Interface !Serial 622.08 Mb/s Differential LVDS STS-12/STM-4 Outputs !Optionally Inserts Byte-interleaved Parity into B1 Byte of Following Frame !Optionally Scrambles Outgoing SONET Data !Optionally Inserts AIS or Unequipped on a Per-channel, Pertime-slot Basis CPU Interface !Generic Microprocessor (CPU) Interface used for Device Configuration and Status Checking F E AT U R E S :.

  VSC9186   VSC9186







Part Number VSC9180
Manufacturers Vitesse Semiconductor
Logo Vitesse Semiconductor
Description Telecomm / Datacomm
Datasheet VSC9186 DatasheetVSC9180 Datasheet (PDF)

TIMESTREAM® PRODUCT FAMILY VSC9180 VSC9180 Arapahoe - 2.5G SONET/SDH Backplane Transceiver 4Hardware Based Switch Over within Receipt of Two or Four Errored Frame Boundaries 4Loss of Signal, Loss of Alignment, and Loss of Frame Alarm Indication 4Received Frame Pointer Output 4Programmable BER Threshold Monitors Based on B1 Parity Monitoring of Both Serial Inputs 4Returns 16 or 4-Bit Parallel LVDS Bit De-multiplexed Outputs Operating at 155MHz or 622MHz with Recovered Bus Clock (Non Interleave M.

  VSC9186   VSC9186







Telecomm / Datacomm

TIMESTREAMTM PRODUCT FAMILY VSC9186 VSC9186 Killington - Quad STS-48/STM-16 and STS-192/STM-64 Line Interface S P E C I F I C AT I O N S : 2.5V I/O and 1.8V Core Power Supplies 0.18µ CMOS Technology 720-pin CCGA /1.0mm Column Pitch 10W Maximum Power Consumption SPLITTER/COMBINER MODE (DWDM): Four independently-timed 2.5Gb/s SONET/SDH signals are received, terminated, and monitored at the line level. They are pointer processed to the local time domain, passed through an STS-1 level crossconnect, and are multiplexed to a STS-192/STM-64 signal. A STS-192/STM-64 is received in the opposite direction and pointer processed to a local clock. The signal is crossconnected at the STS-1 level and then demultiplexed to four STS-48/STM-16 signals. Full section and line termination are performed at all five SONET Tx and Rx interfaces. Overhead transparency is supported through an external interface for maximum customer flexibility. Two Killington devices may to be used in an East/West ring configuration forming a logical 40Gb/s crossconnect. Two bidirectional interfaces allow loopback of all four STS-48/STM-16 and the STS-192/ STM-64 interfaces simultaneously. F E AT U R E S : Bidirectional Quad STS-48/STM-16 or STS-192/ STM-64 Section and Line Termination Device with Pointer Processing and Time Slot Interchange Accommodates a +/- 300ppm Difference Between Incoming and Local System Clock and Performs Pointer Processing on Quad Independent STS-48/ STM-16 or a Single STS-192/STM-6.


2005-10-19 : C30616    C30617    C30637    STP2NA50    STP2NA50FI    C30616    C30637    C30617    C30618    C30616   


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