UDA1343TT

www.DataSheet4U.com INTEGRATED CIRCUITS DATA SHEET UDA1343TT Economy audio CODEC with features Preliminary specification File under Integrated Circuits, IC01 2000 Jan 12 www.DataSheet4U.com Philips Semiconductors Preliminary specification Economy audio CODEC with features FEATURES General Low power consumption 2.4 V to 3.6 V power supply range, with 3 V typical 5 V tolerant TTL compatible digital inputs 256, 384 and 512fs system clock Supports sampling frequencies from 8 to 110 kHz Non-inverting ADC plus integrated high-pass filter to cancel DC offset The ADC supports 2 V (RMS) input signals Stereo PGA with 0 to 24 dB gain in 3 dB steps Overload detector for easy record level control Separate power control for ADC + PGA and DAC Integrated digital interpolation filter plus non-inverting DAC Functions controllable by L3 microcontroller interface Small package size (TSSOP28) ADC and DAC output polarity can be set. Multiple format input interface I2S-bus, MSB-justified up to 24 bits and LSB-justified 16, 18, 20 and 24 bits format compatible Four combined data formats with MSB data output and LSB 16, 18, 20 and 24 bits data input 1fs input and output format data rate. DAC digital sound processing Digital dB-linear volume control (low microcontroller load) via L3 microcontroller in 0.25 dB steps Digital de-emphasis for 32, 44.1, 48 and 96 kHz Cosine roll-soft mute. Advanced audio configuration Stereo single-ended input configuration S...