TMPR3922AU

www.DataSheet4U.com TMPR3922AU TOSHIBA RISC PROCESSOR TMPR3922AU (32-bit RISC Microprocessor) 1. GENERAL DESCRIPTION The TMPR3922AU is a single-chip integrated digital ASSP for PDA(Personal Digital Assistants). The TMPR3922AU consists of PDA system support logic, integrated with the TX3920 processor Core designed by Toshiba. 2. FEATURES - R3000A-based TX3920 Processor Core RISC architecture developed by The MIPS Group, a division of Silicon Graphics, Inc. Toshiba has added its own multiply-add and branch-likely instructions. A single-cycle multiply/accumulate module to allow integrated DSP functions, such as a software modem for high-performance standard data and fax protocols Instruction cache: 16K bytes(2Way); data cache : 8K bytes(2Way) On-chip Translation Lookaside Buffer (TLB) with 64×64-bit wide entries, each of which maps 4K/16K/64K/256K/1M/4M Byte page Max 129MHz operation - Built-in peripheral circuit Clock generator with built-in sixteenfold-frequency phase-locked loop (PLL) Four-stage write buffer A high performance and flexible Bus Interface Unit Multiple DMA channels Memory controller for DRAM(EDO), SDRAM, SRAM, ROM, Flash Memory and PCMCIA Power management unit Big / Little endian - Low power dissipation 3.3V(I/O) / 2.7V(Internal) operation Standby Current 50µA(typ) CPU clock stop mode Power down modes for individual internal peripheral modules - Plastic LQFP 208-pin package The information contained herein is subject to change without notice. TOSHIBA is c...