TOSHIBA Original CMOS 8-Bit Microcontroller
TLCS-870/C Series
TMP86FS27FG
Semiconductor Company
Date 2007/8/7 2008/8/29...
TOSHIBA Original
CMOS 8-Bit Microcontroller
TLCS-870/C Series
TMP86FS27FG
Semiconductor Company
Date 2007/8/7 2008/8/29
Revision History
Revision
1
First Release
2
Contents Revised
Caution in Setting the UART Noise Rejection Time
When UART is used, settings of RXDNC are limited depending on the transfer clock specified by BRG. The combination "O" is available but please do not select the combination "–".
The transfer clock generated by timer/counter interrupt is calculated by the following equation : Transfer clock [Hz] = Timer/counter source clock [Hz] ÷ TTREG set value
BRG setting
Transfer clock [Hz]
000
fc/13
110 (When the transfer clock generated by timer/counter interrupt is the same as the right
side column)
fc/8 fc/16
fc/32
The setting except the above
00 (No noise rejection)
O O O
RXDNC setting
01 (Reject pulses shorter than 31/fc[s] as noise)
10 (Reject pulses shorter than 63/fc[s] as noise)
O
O
–
–
O
–
11 (Reject pulses shorter
than 127/fc[s] as noise)
–
–
–
O
O
O
–
O
O
O
O
2008-08-29
2007-08-07
86FS27-3
(VSS)VSS
1
(X IN )X IN
2
(X O U T) X OU T
3
(TEST)TEST
4
(VDD)VDD
5
XTIN/P21
6
X TO U T/ P22
7
(RESET)RESET
8
STOP/INT5/P20
9
AVDD
10
VAREF
11
AIN0/STOP5/P60
12
AIN1/P61
13
AIN2/P62
14
AIN3/INT0/P63
15
AIN4/STOP2/P64
16
AIN5/STOP3/P65
17
AIN6/STOP4/P66
18
AIN7/P67
19
(RXD)RXD0/SEG39/P00
20
(TXD)TXD0/SEG38/P01
21
INT1/SEG37/P02
22
INT2/SEG36/P03
23
INT3/SEG35/P04
24
P05/SEG34/SI0
...
