TC35274

Preliminary TOSHIBA MPEG-4 Video Decoder LSI MPEG-4 Video Decoder LSI TC35274 TC35274 Tentative Technical Data Sheet MPEG-4 Video Decoder LSI Features U A single-chip MPEG-4 video decoder LSI performs 15frames/sec of MPEG-4 video decoding with QCIF (176x144 pixels) at 30MHz clock frequency. U A 4-Mbit embedded DRAM is integrated to reduce power consumption without performance degradation. U An MPEG-4 video core consists of a 16-bit RISC processor and dedicated hardware accelerators so as to bring programmability, high performance, and low power consumption. P-FBGAxxxx U Firmware program for the RISC is downloaded into the embedded DRAM before starting operation. Other applications, such as H.263, are performed by using appropriate firmware. General host interface is adopted in order to support various host CPU. U TOSHIBA continually is working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specification...