T83C5101

Features 80C51 Code Compatible – 8051 Instruction Compatible – 16 I/O + 2 Outputs in 24 Pin Packages 16 I/O + 6 Outputs in 28 Pin Packages – Three 16-bit Timer/Counters – 256 Bytes Scratchpad RAM Program Memory – 8 KB ROM T83C5102 – 16 KB ROM T83C5101 – 16 KB EPROM/OTP T87C5101 High-speed Architecture 40 MHz from 2.7 to 5.5V, Commercial or Industrial Temperature Range: – 40 MHz with a 40 MHz Crystal In Std. Mode – 40 MHz with a 20 MHz Crystal In X2 Mode 66 MHz from 4.5 to 5.5V, Commercial Temperature Range – 40 MHz with a 40 MHz Crystal in Std. Mode – 66 MHz with a 33 MHz Crystal in X2 Mode Dual Data Pointer On-chip eXpanded RAM (XRAM) (256 bytes) Programmable Clock Out and Up/Down Timer/Counter 2 Asynchronous Port Reset Interrupt Structure with – 6 Interrupt Sources, – 4-Level Priority Interrupt System Full-duplex Enhanced UART – Framing Error Detection – Automatic Address Recognition Low EMI (no ALE) www.DataSheet4U.com Power Control Modes – Idle Mode – Power-down Mode Packages: SO24, DIL24, SSOP24, SO28 8-bit Low Pin Count Microcontrollers T83C5101 T87C5101 T83C5102 Description The T8xC5101/02 family is a high performance CMOS ROM, OTP, EPROM derivative of the 80C51 CMOS single chip 8-bit microcontroller. The T8xC5101/02 family is a low pin count device where only Port 1, port 3 and 2/6 bits of a new port 4 are outputted. This prevents any external access, like external program memory access (fetch, MOVC) or external data memory (MOVX). The...