SY89538L

SY89538L 3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay General Description The SY89538L integrated programmable clock synthesizer and fanout is part of a precision PLLbased clock generation family optimized for enterprise switch, router, and multiprocessor server applications. This family is ideal for generating internal system timing requirements up to 750MHz for multiple ASICs, FPGAs, and NPUs. These devices integrate the following blocks into a single monolithic IC: PLL (Phase-Lock-Loop) based synthesizer Zero-delay MUX and feedback capability 1:4 LVPECL fanout 1:3 LVDS fanout Clock generator (dividers) Logic translation (LVPECL, LVDS) Five-independently programmable output banks This level of integration minimizes additive jitter and part-to-part skew associated with discrete alternatives, resulting in superior system-level timing with reduced board space and power. For applications that do not require a zero-delay function, see the SY89537L. All support documentation can be found on Micrel’s web site at: www.micrel.com. Applications Enterprise routers, switches, servers and workstations Parallel processor-based systems Internal system clock generation for ASICs, NPUs and FPGAs Markets LAN/WAN Enterprise servers Test and measurement Features Precision Edge® Integrated programmable synthesizer with multiple output dividers, fanout buffers, and clock drivers Zero-delay...