Backplane Receive Buffer
SY58627L
DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control Prelimin...
Description
SY58627L
DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control Preliminary
General Description
The SY58627L high-speed, low jitter receive buffer is Precision Edge® optimized for backplane and transmission line data-path Features management applications. The SY58627L is capable of receiving serial data up to 6.4Gbps across up to 36 Selectable equalizing network to optimize incoming inches of FR4. data eye pattern The SY58627L differential input includes Micrel’s Four selectable equalization levels unique, 3-pin input termination architecture that directly Receives up to 36” FR4 PCB trace, or longer interfaces to any differential signal as small as 100mVpk combinations of FR4+cable+interconnect (AC- or DC-coupled) without any termination resistor DC through 6.4Gbps data rate throughput networks in the signal path. The outputs are 50Ω source-terminated CML optimized to drive 400mVpk into Integrated loopback capability 50Ω (100Ω load across the output pair). The I/O Unique, flexible I/O: termination is connected to a dedicated VTT pin for - Patented, Internal termination to VTTIN pin added bias flexibility. interfaces to any differential AC- or DC-coupled The SY58627L receiver input provides four levels of signals equalization to compensate for degraded signals - 50Ω source-terminated CML outputs minimize resulting from transmission losses. The equalization is www.DataSheet4U.com round-trip reflections programmed with...
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