SPN2346W
N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN2346W is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits, and low in-line power loss are needed in a very sma.
N-Channel MOSFET
SPN2346W
N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN2346W is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits, and low in-line power loss are needed in a very small outline surface mount package.
APPLICATIONS Power Management in Note book Portable Equipment Battery Powered System DC/DC Converter Load Switch DSC LCD Display inverter
FEATURES 20V/6.0A,RDS(ON)=35mΩ@VGS=4.5V 20V/5.0A,RDS(ON)=40mΩ@VGS=2.5V 20V/4.0A,RDS(ON)=100mΩ@VGS=1.8V Super high density cell design for extremely low
RDS(ON) Exceptional on-resistance and maximum DC
current capability SOT-23 package design
PIN CONFIGURATION(SOT-23)
2020/01/13 Ver.3
PART MARKING
S46WYW
Page 1
SPN2346W
N-Channel Enhancement Mode MOSFET
PIN DESCRIPTION Pin 1 2 3
Symbol G S D
Description Gate Source Drain
ORDERING INFORMATION
Part Number
Package
SPN2346WS23RGB
SOT-23
※ Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 ) ※ SPN2346WS23RGB : Tape Reel ; Pb – Free ; Halogen – Free
Part Marking S46W
ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage Continuous Drain Current(TJ=150℃) Pulsed Drain Current
TA=25℃ .