SP8782A

SP8782A & B SP8782A & B 1GHz ÷ 16/17, ÷32/33 Multi-Modulus Divider DS3651 Issue 2.4 June 1999 Features q q q q Advanced Resynchronisation techniques to negate loop delay effects CMOS compataible output capability Multi-Modulus division Available as DESC SMD 5962-9208901MPA Odering Information SP8782 A DG SP8782 B MP DES9208901/AC/DGAZ(SMD) Description The SP8782 is a multi-modulus divider which divides by 16/ 17 when the Ratio Select input is low and by 32/33 when theRatio Select input is high. When high, the modulus Control input selects the lower division ratio (16 or 32) and the higher ratio (17 or 33) when it is low. The device uses resynchronisation techniques to reduce the effects of propagation delays in frequency synthesis. The SP8782A (ceramic DIL package) is characterised over the full military temperature range of -55°C to +125°C, the SP8782B (miniature plastic DIL package) over the industrial range of -40°C to+85°C. Absolute Maximum Ratings Supply Voltage Clock input level Junction temperature Storage temperature range: SP8782A SP8782B 6V 2.5V p-p +175°C -55°C to +150°C -55°C to +125°C RATIO SELECT 1 VCC 2 CLOCK INPUT CLOCK INPUT 2 3 ÷ 16/17 ÷ 32/33 7 OUTPUT 4 VEE 5 MODULUS CONTROL INPUT Figure 1 Functional Diagram 1 SP8782A & B RATIO SELECT CLOCK INPUT CLOCK INPUT VEE 1 2 3 4 8 7 6 5 VCC OUTPUT NC MODULUS CONTROL DG 8 RATIO SELECT CLOCK INPUT CLOCK INPUT VEE 1 2 3 4 8 7 6 5 VCC OUTPUT NC MODULUS CONTROL MP 8 Figure 2 Typical Pin Connections ...