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SL74HC125 Datasheet

Part Number SL74HC125
Manufacturers System Logic Semiconductor
Logo System Logic Semiconductor
Description Quad 3-State Noninverting Buffers
Datasheet SL74HC125 DatasheetSL74HC125 Datasheet (PDF)

SL74HC125 Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS The SL74HC125 is identical in pinout to the LS/ALS125. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC125 noninverting buffers are designed to be used with 3state memory address drivers, clock drivers, and other bus-oriented systems. The devices have four separate output enables that are activelow. • Outputs Directly Interface .

  SL74HC125   SL74HC125






Part Number SL74HC123
Manufacturers System Logic Semiconductor
Logo System Logic Semiconductor
Description Dual Retriggerable Monostable Multivibrator
Datasheet SL74HC125 DatasheetSL74HC123 Datasheet (PDF)

SL74HC123 Dual Retriggerable Monostable Multivibrator The SL74HC123 is identical in pinout to the LS/ALS123. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. There are two trigger inputs, A INPUT (negative edge) and B INPUT (positive edge). These inputs are valid for rising/falling signals. The device may also be triggered by using the CLR input (positiveedge) because of the Schmitt-trigger input; after triggering th.

  SL74HC125   SL74HC125







Quad 3-State Noninverting Buffers

SL74HC125 Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS The SL74HC125 is identical in pinout to the LS/ALS125. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC125 noninverting buffers are designed to be used with 3state memory address drivers, clock drivers, and other bus-oriented systems. The devices have four separate output enables that are activelow. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA • High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC125N Plastic SL74HC125D SOIC TA = -55° to 125° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Inputs PIN 14 =VCC PIN 7 = GND A H L X OE L L H Output Y H L Z X = don’t care Z = high impedance SLS System Logic Semiconductor SL74HC125 MAXIMUM RATINGS * Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±35 ±75 750 500 -65 to +150 260 Unit V V V mA mA mA mW °C °C Maximum Ratings ar.


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