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SAA7185

NXP

Digital Video Encoder DENC2

INTEGRATED CIRCUITS DATA SHEET SAA7185 Digital Video Encoder (DENC2) Preliminary specification Supersedes data of 1995 ...


NXP

SAA7185

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INTEGRATED CIRCUITS DATA SHEET SAA7185 Digital Video Encoder (DENC2) Preliminary specification Supersedes data of 1995 Jun 15 File under Integrated Circuits, IC02 1996 Jul 08 Philips Semiconductors Preliminary specification Digital Video Encoder (DENC2) FEATURES CMOS 5 V device Digital PAL/NTSC encoder System pixel frequency 13.5 MHz Accepts MPEG decoded data 8-bit wide MPEG port Input data format Cb, Y, Cr etc. (CCIR 656) 16-bit wide YUV input port I2C-bus control or alternatively MPU parallel control port Encoder can be master or slave Programmable horizontal and vertical input synchronization phase Programmable horizontal sync output phase OSD overlay with Look-Up Tables (LUTs) 8 × 3 bytes Colour bar generator Line 21 Closed Caption encoder Cross-colour reduction DACs operating at 27 MHz with 10-bit resolution Controlled rise/fall times of output syncs and blanking Down-mode of DACs CVBS and S-Video output simultaneously PLCC68 package. QUICK REFERENCE DATA SYMBOL VDDA VDDD IDDA IDDD Vi Vo(p-p) RL ILE DLE Tamb analog supply voltage digital supply voltage analog supply current digital supply current input signal voltage levels analog output signal voltages Y, C and CVBS without load − (peak-to-peak value) load resistance LF integral linearity error LF differential linearity error operating ambient temperature 80 − − 0 PARAMETER MIN. 4.75 4.5 − − TYP. 5.0 5.0 50 140 2 − − − − GENERAL DESCRIPTION SAA7185 The SAA7185 encodes digital...




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