SAA7140A

INTEGRATED CIRCUITS DATA SHEET SAA7140A; SAA7140B High Performance Scaler (HPS) Objective specification Supersedes data of 1996 Jul 26 File under Integrated Circuits, IC22 1996 Sep 04 Philips Semiconductors Objective specification High Performance Scaler (HPS) CONTENTS 1 2 3 4 5 6 7 7.1 7.1.1 7.1.2 7.2 7.3 7.4 7.4.1 7.4.2 7.4.3 7.5 7.6 7.6.1 7.7 7.7.1 7.8 7.8.1 7.8.2 7.8.3 8 8.1 8.2 8.3 8.3.1 8.3.2 8.3.3 8.3.4 9 10 11 12 13 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING (SAA7140A) PINNING (SAA7140B) FUNCTIONAL DESCRIPTION Data format/reformatter and reference signal generation Data formats and reference signals of the DMSD port Data formats and reference signals of the expansion port Acquisition control BCS control Scaling unit Horizontal prescaling Vertical scaler Horizontal variable phase scaling CSM (Colour Space Matrix), dither and gamma correction Output formatter and output FIFO register Data formats and reference signals of the VRAM port Data transfer modes Expansion port modes VRAM port modes Data burst transfer mode (FIFO Mode) Continuous data transfer mode (transparent mode) I2C-bus controlled pseudo sleep mode I2C-BUS PROTOCOL I2C-bus format I2C-bus bitmap Description of the I2C-bus bits Initial settings for the expansion and DMSD port; Subaddress 00H Initial settings for the VRAM port; subaddress 01H Port I/O control; subaddress 21H Register set A (02H to 1FH) and B (22H to 3FH) LIMITING VALUES HANDLING THERMAL CHARACTERISTICS DC CHARAC...