PXA270

Intel® PXA270 Processor Electrical, Mechanical, and Thermal Specification Data Sheet n n n n n n n n n n High-performance processor: — Intel XScale® microarchitecture with Intel® Wireless MMX™ Technology — 7 Stage pipeline — 32 KB instruction cache — 32 KB data cache — 2 KB “mini” data cache — Extensive data buffering 256 Kbytes of internal SRAM for high speed code or data storage preserved during low-power states High-speed baseband processor interface (Mobile Scalable Link) Rich serial peripheral set: — AC’97 audio port — I2S audio port — USB Client controller — USB Host controller — USB On-The-Go controller — Three high-speed UARTs (two with hardware flow control) — FIR and SIR infrared communications port Hardware debug features — IEEE JTAG interface with boundary scan Hardware performance-monitoring features with on-chip trace buffer Real-time clock Operating-system timers LCD Controller Universal Subscriber Identity Module interface n n n n Low power: — Wireless Intel Speedstep® Technology — Less than 500 mW typical internal dissipation — Supply voltage may be reduced to 0.85 V — Four low-power modes — Dynamic voltage and frequency management High-performance memory controller: — Four banks of SDRAM: up to 104 MHz @ 2.5V, 3.0V, and 3.3V I/O interface — Six static chip selects — Support for PCMCIA and Compact Flash — Companion chip interface Flexible clocking: — CPU clock from 104 to 624 MHz — Flexible memory clock ratios — Frequency changes — Functional clock ...