PDTA114ES

DISCRETE SEMICONDUCTORS DATA SHEET book, halfpage M3D186 PDTA114ES PNP resistor-equipped transistor Product specification Supersedes data of 1997 Jul 02 File under Discrete Semiconductors, SC04 1998 May 18 Philips Semiconductors Product specification PNP resistor-equipped transistor FEATURES Built-in bias resistors R1 and R2 (typ. 10 kΩ each) Simplification of circuit design Reduces number of components and board space. APPLICATIONS Especially suitable for space reduction in interface and driver circuit applications Inverter circuit configurations without use of external resistors. DESCRIPTION PNP resistor-equipped transistor in a TO-92; SOT54 plastic package. NPN complement: PDTC114ES. PINNING PIN 1 2 3 DESCRIPTION base/input collector/output emitter/ground (+) Fig.2 Equivalent inverter symbol. MAM338 PDTA114ES handbook, halfpage 2 R1 1 R2 3 1 2 3 Fig.1 Simplified outline (TO-92; SOT54) and symbol. 1 3 MGL136 2 QUICK REFERENCE DATA SYMBOL VCEO IO ICM Ptot hFE R1 R2 ------R1 PARAMETER collector-emitter voltage output current (DC) peak collector current total power dissipation DC current gain input resistor resistor ratio Tamb ≤ 25 °C IC = −5 mA; VCE = −5 V CONDITIONS open base − − − − 30 7 0.8 MIN. − − − − − 10 1 TYP. MAX. −50 −100 −100 500 − 13 1.2 kΩ UNIT V mA mA mW 1998 May 18 2 Philips Semiconductors Product specification PNP resistor-equipped transistor LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCBO ...