PDM41256

PDM41256 256K Static RAM 32K x 8-Bit Features s High-speed access times Com’l: 7, 8, 10, 12, and 15 ns Ind’l: 8, 10, 12, and 15 ns s Low power operation (typical) - PDM41256SA Active: 400 mW Standby: 150 mW - PDM41256LA Active: 350 mW Standby: 25 mW s Single +5V (±10%) power supply s TTL-compatible inputs and outputs s Packages Plastic SOJ (300 mil) - TSO Plastic TSOP - T 1 2 3 4 5 6 7 8 9 10 11 12 Description The PDM41256 is a high-performance CMOS static RAM organized as 32,768 x 8 bits. This product is produced in Paradigm’s proprietary CMOS technology which offers the designer the highest speed parts. Writing to this device is accomplished when the write enable (WE) and the chip enable (CE) inputs are both LOW. Reading is accomplished when WE remains HIGH and CE and OE are both LOW. The PDM41256 operates from a single +5V power supply and all the inputs and outputs are fully TTLcompatible. The PDM41256 comes in two versions, the standard power version PDM41256SA and a low power version the PDM41256LA. The two versions are functionally the same and only differ in their power consumption. The PDM41256 is available in a 28-pin plastic TSOP and a 28-pin 300-mil plastic SOJ. Functional Block Diagram Rev. 2.0 - 7/17/96 3-33 PDM41256 Pin Configurations TSOP SOJ Pin Description Name A14-A0 I/O7-I/O0 OE WE CE VCC VSS Description Address Inputs Data Inputs/Outputs Output Enable Input Write Enable Input Chip Enable Input Power (+5V) Ground Truth Table OE X L X H WE X H L H C...