P521-49

Preliminary P521-49 Low Phase Noise LVDS VCXO (27MHz to 65MHz) FEATURES 27MHz to 65MHz Fundamental Mode Crystal. Output range: 27MHz – 65MHz. Complementary LVDS outputs. Selectable OE Logic (enable high or enable low). Integrated variable capacitors. High pull linearity: < 5%. +/- 125 ppm pull range www.DataSheet4U.com Supports 2.5V or 3.3V-Power Supply. Available in die form. Thickness 10 mil. DIE CONFIGURATION 57.5 mil VDDOSC OSCOFF OESEL V N/C N/C (1460,1435) GNDOSC VCON XIN 18 17 16 15 14 13 12 VDDANA VDDBUF VDDBUF PECLBAR PECL GNDBUF 19 11 20 10 9 8 56.5 mil XOUT OE 21 7 22 1 2 3 4 5 6 GNDOSC GNDANA GNDANA VCON GNDBUF Y (0,0) DESCRIPTIONS P521-49 is a VCXO IC specifically designed to pull high frequency fundamental crystals. Its internal varicaps allow an on chip frequency pulling, controlled by the VCON input. The chip provides a low phase noise, low jitter LVDS differential clock output. X DIE SPECIFICATIONS Name Size Reverse side Pad dimensions Thickness Value 56.5 x 57.5 mil GND 80 micron x 80 micron 10 mil BLOCK DIAGRAM OE VCON Oscillator X+ XQ Q OUTPUT ENABLE LOGIC SELECTION OESEL (Pad #14) 0 (Default) OECTRL (Pad #22) 0 1 (Default) 0 (Default) 1 State Tri-state Output enabled Output enabled Tri-state Amplifier w/ integrated varicaps P521-49 1 Pad #14, 22: Bond to GND to set to “0”, bond to VDD to set to “1” No connection results to “default” setting through internal pull-up/-down. Pad #22: Logical states def...