OQ2536HP

INTEGRATED CIRCUITS DATA SHEET OQ2536HP SDH/SONET STM16/OC48 demultiplexer Product specification File under Integrated Circuits, IC19 1998 Mar 10 Philips Semiconductors Product specification SDH/SONET STM16/OC48 demultiplexer FEATURES Normal and loop (test) modes 1.2 V GTL (Gunning Transceiver Logic) level compatible data and clock outputs (low speed interface) Differential CML (Current-Mode Logic) data and clock inputs High input sensitivity (100 mV for the high speed inputs) Boundary Scan Test (BST) at low speed interface, in accordance with “IEEE Std 1149.1-1990” Low power dissipation (typically 1.45 W). ORDERING INFORMATION TYPE NUMBER OQ2536HP PACKAGE NAME HLQFP100 DESCRIPTION DESCRIPTION OQ2536HP The OQ2536HP is a 32-channel demultiplexer intended for use in STM16/OC48 applications. It demultiplexes a single 2.5 Gbits/s input channel to 32 × 78 Mbits/s output channels. The data and clock outputs on the low speed interface are GTL compatible, while the high speed data and clock inputs are CML compatible. VERSION SOT470-1 plastic heat-dissipating low profile quad flat package; 100 leads; body 14 × 14 × 1.4 mm BLOCK DIAGRAM handbook, full pagewidth DIN DINQ CIN CINQ 54 53 56 57 2.5 Gbits/s 1 : 4 DMUX 622 Mbits/s 4 4× 1 : 8 DMUX (1) 78 Mbits/s D0 to D31 75 68 69 70 72 71 12 BST LOGIC ENL TRST TMS TCK TDI TDO CDIV OQ2536HP DLOOP DLOOPQ CLOOP CLOOPQ DIOA DIOC 65 66 60 59 32 31 (2) DIVIDE BY 4 2.5 GHz 622 MHz DIVIDE BY 8 78 MHz BAND GAP REFER...