CMOS Gate Array
Core Logic
21[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description ON8x is a family of OR-NAND circuits consisting of tw...
Description
Core Logic
21[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description ON8x is a family of OR-NAND circuits consisting of two 2-input OR gates into a 3-input NAND gate.
Logic Symbol
Truth Table
A
ON8x
ABCDEQ
B L LXXXH
XXL LXH
C D
Q XXXXLH
All other combinations L
E
HDL Syntax Verilog .................... ON8x inst_name (Q, A, B, C, D, E); VHDL...................... inst_name: ON8x port map (Q, A, B, C, D, E);
Pin Loading
Pin Name
A B C D E
ON82 1.0 1.0 1.0 1.0 1.0
Equivalent Loads ON84 1.0 1.0 1.0 1.0 1.0
ON86 2.1 2.1 2.1 2.1 2.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
ON82 ON84 ON86
5.0 5.0 12.0
TBD TBD TBD
9.9 10.3 22.0
a. See page 2-15 for power equation.
3-195
21[
®
$0,+* PLFURQ &026 *DWH $UUD\
Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.0V, Typical Process
Number of Equivalent Loads
1
4
ON82
From: Any Input To: Q
tPLH tPHL
0.41 0.50
0.50 0.64
Nu...
Similar Datasheet