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ODTSXX12
CMOS Gate Array
Description
2'76;;[[ ® $0,+* PLFURQ &026 *DWH $UUD\ Description ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with controlled slew rate outputs. Logic Symbol Truth Table ODTSXXxx A SL PADM A PADM LL HH HDL Syntax Verilog .................... ODTSXXxx inst_name (PADM, A); VHDL...................... inst_name: ODTSXXxx por...
AMI
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ODTSXX16
CMOS Gate Array
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