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MT9VDDT6472H Datasheet

Part Number MT9VDDT6472H
Manufacturers Micron
Logo Micron
Description 512MB DDR SDRAM SODIMM
Datasheet MT9VDDT6472H DatasheetMT9VDDT6472H Datasheet (PDF)

128MB, 256MB, 512MB (x72, ECC, SR) 200-Pin DDR SODIMM Features DDR SDRAM SODIMM MT9VDDT1672H – 128MB1 MT9VDDT3272H – 256MB MT9VDDT6472H – 512MB For component data sheets, refer to Micron’s Web site: www.micron.com Features • 200-pin, small-outline dual in-line memory module (SODIMM) • Fast data transfer rates: PC2100, PC2700, or PC3200 • 128MB (16 Meg x 72), 256MB (32 Meg x 72), and 512MB (64 Meg x 72) • Supports ECC error detection and correction • VDD = VDDQ = 2.5V (-40B: VDD = VDDQ = 2.6V) •.

  MT9VDDT6472H   MT9VDDT6472H






Part Number MT9VDDT6472A
Manufacturers Micron
Logo Micron
Description 512MB DDR SDRAM UNBUFFERED DIMM
Datasheet MT9VDDT6472H DatasheetMT9VDDT6472A Datasheet (PDF)

128MB, 256MB, 512MB (x72, ECC, SR), PC3200 184-Pin DDR SDRAM UDIMM DDR SDRAM UNBUFFERED DIMM MT9VDDT1672A – 128MB MT9VDDT3272A – 256MB MT9VDDT6472A – 512MB For the latest data sheet, please refer to the Micron Web site: www.micron.com/products/modules Features • JEDEC-standard 184-pin dual in-line memory module (DIMM) • Fast data transfer rate: PC3200 • CAS Latency 3 • Utilizes 400 MT/s DDR SDRAM components • Supports ECC error detection and correction • 128MB (16 Meg x 72), 256MB (32 Meg x .

  MT9VDDT6472H   MT9VDDT6472H







512MB DDR SDRAM SODIMM

128MB, 256MB, 512MB (x72, ECC, SR) 200-Pin DDR SODIMM Features DDR SDRAM SODIMM MT9VDDT1672H – 128MB1 MT9VDDT3272H – 256MB MT9VDDT6472H – 512MB For component data sheets, refer to Micron’s Web site: www.micron.com Features • 200-pin, small-outline dual in-line memory module (SODIMM) • Fast data transfer rates: PC2100, PC2700, or PC3200 • 128MB (16 Meg x 72), 256MB (32 Meg x 72), and 512MB (64 Meg x 72) • Supports ECC error detection and correction • VDD = VDDQ = 2.5V (-40B: VDD = VDDQ = 2.6V) • VDDSPD = 2.3–3.6V • 2.5V I/O (SSTL_2-compatible) • Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle • Bidirectional data strobe (DQS) transmitted/ received with data—that is, source-synchronous data capture • Differential clock inputs (CK and CK#) • Multiple internal device banks for concurrent operation • Selectable burst lengths (BL) 2, 4, or 8 • Auto precharge option • Auto refresh and self refresh modes: 15.62.


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