MT46V64M4

256Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate (DDR) SDRAM MT46V64M4 – 16 Meg x 4 x 4 banks MT46V32M8 – 8 Meg x 8 x 4 banks MT46V16M16 – 4 Meg x 16 x 4 banks Features VDD VDD = = 2.5V 2.6V ±0.2V; ±0.1V; VDDQ VDDQ = = 2.5V 2.6V ±0.2V ±0.1V (DDR400)1 Bidirectional data strobe (DQS) transmitted/ received with data, that is, source-synchronous data capture (x16 has two – one per byte) Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle Differential clock inputs (CK and CK#) Commands entered on each positive CK edge DQS edge-aligned with data for READs; center- aligned with data for WRITEs DLL to align DQ and DQS transitions with CK Four internal banks for concurrent operation Data mask (DM) for masking write data (x16 has two – one per byte) Programmable burst lengths (BL): 2, 4, or 8 Auto refresh – 64ms, 8192-cycle Longer-lead TSOP for improved reliabi...