DatasheetsPDF.com

MRF9582NT1 Datasheet

Part Number MRF9582NT1
Manufacturers Freescale Semiconductor
Logo Freescale Semiconductor
Description Silicon Lateral FET / N -Channel Enhancement-Mode MOSFET
Datasheet MRF9582NT1 DatasheetMRF9582NT1 Datasheet (PDF)

www.DataSheet4U.com Freescale Semiconductor Technical Data Document Number: MRF9582NT1 Rev. 1, 7/2006 Silicon Lateral FET, N - Channel Enhancement - Mode MOSFET Designed for use in medium voltage, moderate power amplifiers such as portable analog and digital cellular radios and PC RF modems. • Typical CW RF Performance @ 849 MHz: VDD = 12.5 Volts, IDQ = 300 mA, Pout = 38 dBm Power Gain — 10.5 dB Drain Efficiency — 55% • Capable of Handling 10:1 VSWR, @ 12.5 Vdc, 849 MHz, 38 dBm • RoHS Compli.

  MRF9582NT1   MRF9582NT1






Silicon Lateral FET / N -Channel Enhancement-Mode MOSFET

www.DataSheet4U.com Freescale Semiconductor Technical Data Document Number: MRF9582NT1 Rev. 1, 7/2006 Silicon Lateral FET, N - Channel Enhancement - Mode MOSFET Designed for use in medium voltage, moderate power amplifiers such as portable analog and digital cellular radios and PC RF modems. • Typical CW RF Performance @ 849 MHz: VDD = 12.5 Volts, IDQ = 300 mA, Pout = 38 dBm Power Gain — 10.5 dB Drain Efficiency — 55% • Capable of Handling 10:1 VSWR, @ 12.5 Vdc, 849 MHz, 38 dBm • RoHS Compliant • In Tape and Reel. T1 Suffix = 1,000 Units per 12 mm, 7 inch Reel MRF9582NT1 849 MHz, 38 dBm, 12.5 V HIGH FREQUENCY POWER TRANSISTOR LDMOS FET 3 2 1 4 CASE 449 - 02, STYLE 1 PLD - 1 Table 1. Maximum Ratings Rating Drain - Source Voltage Drain - Gate Voltage (RGS = 1.0 MΩ) Gate - Source Voltage Drain Current - Continuous Total Device Dissipation @ TC = 85°C Storage Temperature Range Operating Junction Temperature Symbol VDSS VDGO VGS ID PD Tstg TJ Value 17 17 4.0 1.5 10.5 - 65 to 150 150 Unit Vdc Vdc Vdc Adc W °C °C DataShee DataSheet4U.com Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction - to - Case Symbol RθJC Rating 1 Value 6 Unit °C/W Unit °C Table 3. Moisture Sensitivity Level Test Methodology Per JESD 22 - A113, IPC/JEDEC J - STD - 020 Package Peak Temperature 260 NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. DataSheet4U.


2006-08-24 : 82C765    1N201    1N202    1N203    1N204    1N205    1N206    1N207    1N208    1N209   


@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)