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MM74HC74A Datasheet

Part Number MM74HC74A
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description Dual D-Type Flip-Flop
Datasheet MM74HC74A DatasheetMM74HC74A Datasheet (PDF)

Dual D-Type Flip-Flop with Preset and Clear MM74HC74A The MM74HC74A utilizes advanced silicon−gate CMOS technology to achieve operating speeds similar to the equivalent LS−TTL part. It possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS−TTL loads. This flip−flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during .

  MM74HC74A   MM74HC74A






Part Number MM74HC74A
Manufacturers Fairchild
Logo Fairchild
Description Dual D-Type Flip-Flop
Datasheet MM74HC74A DatasheetMM74HC74A Datasheet (PDF)

MM74HC74A — Dual D-Type Flip-Flop with Preset and Clear February 2008 MM74HC74A Dual D-Type Flip-Flop with Preset and Clear Features ■ Typical propagation delay: 20ns ■ Wide power supply range: 2V–6V ■ Low quiescent current: 40µA maximum (74HC Series) ■ Low input current: 1µA maximum ■ Fanout of 10 LS-TTL loads General Description The MM74HC74A utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to the equivalent LS-TTL part. It possesses the high noise immunit.

  MM74HC74A   MM74HC74A







Dual D-Type Flip-Flop

Dual D-Type Flip-Flop with Preset and Clear MM74HC74A The MM74HC74A utilizes advanced silicon−gate CMOS technology to achieve operating speeds similar to the equivalent LS−TTL part. It possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS−TTL loads. This flip−flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive−going transition of the clock pulse. Preset and clear are independent of the clock and accomplished by a low level at the appropriate input. The 74HC logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features • Typical Propagation Delay: 12 ns • Wide Power Supply Range: 2 V – 6 V • Low Quiescent Current: 80 mA maximum (74HC Series) • Low Input Current: 1 mA Maximum • Fanout of 10 LS−TTL Loads • These Devices are Pb−Free, Halide Free and are RoHS Compliant Connection Diagram DATA SHEET www.onsemi.com 14 1 SOIC−14 CASE 751EF 14 1 TSSOP−14 WB CASE 948G MARKING DIAGRAM 14 HC74A AWLYWW 1 SOIC−14 NB 14 HC 74A ALYW 1 TSSOP−14 WB HC74A = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week Figure 1. Pin Assignments for SOIC and TSSOP TRUTH TABLE Inputs Outputs PR CLR CLK D Q Q L H X.


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