MM74HC589

MM74HC589 8-Bit Shift Registers with Input Latches and 3-STATE Serial Output September 1983 Revised February 1999 MM74HC589 8-Bit Shift Registers with Input Latches and 3-STATE Serial Output General Description The MM74HC589 high speed shift register utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. The MM74HC589 comes in a 16-pin package and consists of an 8-bit storage latch feeding a parallel-in, serial-out 8bit shift register. Data can also be entered serially the shift register through the SER pin. Both the storage register and shift register have positive-edge triggered clocks, RCK and SCK, respectively. SLOAD pin controls parallel LOAD or serial shift operations for the shift register. The shift register has a 3-STATE output to enable the wire-ORing of multiple devices on a serial bus. The 74HC logic family is speed, function, and pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features s 8-bit parallel storage register inputs s Wide operating voltage range: 2V–6V s Shift register has direct overriding load s Guaranteed shift frequency. . . DC to 30 MHz s Low quiescent current: 80 µA maximum (74HC Series) s 3-STATE output for ‘Wire-OR' Ordering Code: Order Number MM74HC589M MM74HC589SJ MM74HC589MTC MM74HC589N Pa...