MM74C901

MM74C901 MM74C902 Hex Inverting TTL Buffer Hex Non-Inverting TTL Buffer October 1987 Revised January 1999 MM74C901 MM74C902 Hex Inverting TTL Buffer Hex Non-Inverting TTL Buffer General Description The MM74C901 and MM74C902 hex buffers employ complementary MOS to achieve wide supply operating range, low power consumption, and high noise immunity. These buffers provide direct interface from PMOS into CMOS or TTL and direct interface from CMOS to TTL or CMOS operating at a reduced VCC supply. Features s Wide supply voltage range: s Guaranteed noise margin: s High noise immunity: 3.0V to 15V 1.0V 0.45 VCC (typ.) s TTL compatibility: Fan out of 2 driving standard TTL Ordering Code: Order Number MM74C901M MM74C901N MM74C902M MM74C902N Package Number M14A N14A M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Assignments for DIP and SOIC MM74C901 MM74C902 Top View Top View Logic Diagrams MM74C901 CMOS to TTL Inverting Buffer MM74C902 CMOS to TTL Buffer © 1999 Fairchild Semiconductor Corporation DS005909.prf www.fairchildsemi.com MM74C901 MM74C902 Absolute Max...