MM74C74

MM74C74 Dual D-Type Flip-Flop October 1987 Revised January 1999 MM74C74 Dual D-Type Flip-Flop General Description The MM74C74 dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset or clear is independent of the clock and accomplished by a low level at the preset or clear input. s High noise immunity: 0.45 VCC (typ.) s Low power: 50 nW (typ.) s Medium speed operation: 10 MHz (typ.) with 10V supply Applications Automotive Data terminals Instrumentation Medical electronics Alarm system Features s Supply voltage range: 3V to 15V s Tenth power TTL compatible: Drive 2 LPT2L loads Industrial electronics Remote metering Computers Ordering Code: Order Number MM74C74M MM74C74N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP and SOIC Truth Table Preset 0 0 1 1 Clear 0 1 0 1 Qn 0 1 0 Qn (Note 1) Qn 0 0 1 Qn (Note 1) Note 1: No change in output from previous state. Not...