MM54C48 MM74C48 BCD-to-7 Segment Decoder
March 1988
MM54C48 MM74C48 BCD-to-7 Segment Decoder
General Description
The ...
MM54C48 MM74C48 BCD-to-7 Segment Decoder
March 1988
MM54C48 MM74C48 BCD-to-7 Segment Decoder
General Description
The MM54C48 MM74C48 BCD-to-7 segment decoder is a monolithic complementary MOS (
CMOS) integrated circuit constructed with N- and P-channel enhancement transistors Seven NAND gates and one driver are connected in pairs to make binary-coded decimal (BCD) data and its complement available to the seven decoding AND-OR-INVERT gates The remaining NAND gate and three input buffers provide test-blanking input ripple-blanking output and ripple-blanking inputs
Features
Y Wide supply
voltage range
3 0V to 15V
Y Guaranteed noise margin
1 0V
Y High noise immunity Y Low power
0 45 VCC (typ ) fan out of 2
TTL compatibility
driving 74L
Y High current sourcing output (up to 50 mA)
Y Ripple blanking for leading or trailing zeros (optional)
Y Lamp test provision
Connection Diagram
Dual-In-Line Package
Top View Order Number MM54C48 or MM74C48
TL F 5883 – 1
Segment Identifi...
