Octal 80-Bit Static Shift Register
MM5034 MM5035 Octal 80-Bit Static Shift Register
April 1990
MM5034 MM5035 Octal 80-Bit Static Shift Register
General D...
Description
MM5034 MM5035 Octal 80-Bit Static Shift Register
April 1990
MM5034 MM5035 Octal 80-Bit Static Shift Register
General Description
The MM5034 octal 80-bit shift register is a monolithic MOS integrated circuit utilizing N-channel low threshold enhancement mode and ion-implanted depletion mode devices The MM5034 is designed for use in computer display peripherals All inputs and outputs are TTL compatible The clocks and recirculate logic are internal to reduce system component count and TRI-STATE output buffers provide bus interface Because of its N-channel characteristics single 5V power supply operation is required Simple interface to the NSC CRT DP8350 controller and character generator to incorporate an entire CRT terminal is feasible with the MM5034 The MM5034 is available in a 22-lead dual-in-line package The MM5035 is a 20-pin version of the MM5034 with the TRI-STATE output select feature omitted for a simple data in data out operation
Features
Y Y Y Y Y Y
Single 5V power supply Internal clocks High speed and static operation TRI-STATE output buffer Recirculate and outut select independent TTL compatible
Applications
Y Y
CRT displays Computer peripherals
Connection Diagrams
Dual-In-Line Package Dual-In-Line Package
TL F 10821 – 2 TL F 10821 – 1
Top View Order Number MM5035N See NS Package Number N20A
Top View Order Number MM5034N See NS Package Number N22A
TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corpo...
Similar Datasheet