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ML4642 Datasheet

Part Number ML4642
Manufacturers Micro Linear
Logo Micro Linear
Description AUI Multiplexer
Datasheet ML4642 DatasheetML4642 Datasheet (PDF)

April 1997 ML4642 AUI Multiplexer GENERAL DESCRIPTION The ML4642 AUI Multiplexer contains all the necessary drivers/receivers and control logic to implement a 2 port MAU when used in conjuction with a transceiver chip which has a standard 802.3 AUI interface. In addition, the ML4642 is capable of operating in stand-alone mode where it interconnects two DTEs in the absence of a network MAU. Several ML4642s can be cascaded together to implement a 4 or 8 port MAU or stand-alone device. Logic withi.

  ML4642   ML4642






Part Number ML4644
Manufacturers Micro Linear
Logo Micro Linear
Description 4 Port AUI Multiplexer
Datasheet ML4642 DatasheetML4644 Datasheet (PDF)

April 1997 ML4644* 4 Port AUI Multiplexer GENERAL DESCRIPTION The ML4644 AUI Multiplexer contains all the necessary drivers/receivers and control logic to implement a 4 port MAU when used in conjuction with a transceiver chip which has a standard 802.3 AUI interface. Several ML4644s can be cascaded together to implement an 8 or 12 port MAU or standalone device. Logic within the ML4644 detects collisions resulting from multiple DTEs transmitting simultaneously. In addition, collision signals rec.

  ML4642   ML4642







AUI Multiplexer

April 1997 ML4642 AUI Multiplexer GENERAL DESCRIPTION The ML4642 AUI Multiplexer contains all the necessary drivers/receivers and control logic to implement a 2 port MAU when used in conjuction with a transceiver chip which has a standard 802.3 AUI interface. In addition, the ML4642 is capable of operating in stand-alone mode where it interconnects two DTEs in the absence of a network MAU. Several ML4642s can be cascaded together to implement a 4 or 8 port MAU or stand-alone device. Logic within the ML4642 detects collisions resulting from multiple DTEs transmitting simultaneously. In addition, collision signals received from a transceiver attached at the MAU port are propagated to both of the DTE ports. Jabbering DTEs are prevented from loading down the network by internal jabber timers which disable babbling ports. s FEATURES IEEE 802.3 compliant AUI interfaces assure compatibility with any AUI ready devices No crystal or clock input On-chip Jabber logic, Collision Detection, and SQE test with enable/disable option Selectable Loopback, Jabber, and SQE Test allows cascading of multiple chips to increase DTE port s s s BLOCK DIAGRAM +5V 61.9K RRSET VCC VCC CONTROL LOGIC TXIN1P TXIN1N RXOUT1P RXOUT1N CDOUT1P CDOUT1N TXIN2P TXIN2N RXOUT2P RXOUT2N CDOUT2P CDOUT2N LED DRIVERS MAU AUI INTERFACE CI MUX MAU AUI INTERFACE JABBER DO MUX DTE AUI INTERFACE TXOUTP TXOUTN DI MUX RXINP RXINN CDINP CDINN SQE SOURCE GND JAB1/JDIS JAB2 CDLED RXLED/LPBK/SQE TXLED1 TXLED2 1.


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