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MK2049-01 Datasheet

Part Number MK2049-01
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description Communications Clock PLL
Datasheet MK2049-01 DatasheetMK2049-01 Datasheet (PDF)

MK2049-01 Communications Clock PLL Description The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to an 8 kHz backplane clock, simplifying clock distribution in communicatio.

  MK2049-01   MK2049-01






Part Number MK2049-03
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description Communications Clock PLLs
Datasheet MK2049-01 DatasheetMK2049-03 Datasheet (PDF)

MK2049-02/03 Communications Clock PLLs Description The MK2049-02 and MK2049-03 are PhaseLocked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks frequency-locked and phaselocked to an 8 kHz backplane clock, simplifying clock synchronization in communications systems. The MK2049-02/03 can also acce.

  MK2049-01   MK2049-01







Part Number MK2049-02
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description Communications Clock PLLs
Datasheet MK2049-01 DatasheetMK2049-02 Datasheet (PDF)

MK2049-02/03 Communications Clock PLLs Description The MK2049-02 and MK2049-03 are PhaseLocked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks frequency-locked and phaselocked to an 8 kHz backplane clock, simplifying clock synchronization in communications systems. The MK2049-02/03 can also accep.

  MK2049-01   MK2049-01







Communications Clock PLL

MK2049-01 Communications Clock PLL Description The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to an 8 kHz backplane clock, simplifying clock distribution in communications systems. MicroClock can customize this device for many other different frequencies. Contact your MicroClock representative for more details. For a fixed input-output phase relationship, refer to the MK2049-02, -03, or -3x. The MK2049-3x are 3.3 V devices. Features • Packaged in 20 pin SOIC • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock or Loop Timing frequencies • Locks to 8 kHz ±100 ppm (External mode) • Exact internal ratios eliminate the need for external dividers • Zero ppm synthesis error in all output clocks. • Output clock rates include T1, E1, T3, E3, and OC3÷8 • 5 V ±5% operation • Offered in Commercial and Industrial temperature versions Block Diagram VDD GND 4 4 FS3:0 4 Clock Input Reference Crystal External/ Loop Timing Mux PLL Clock Synthesis, Control, and Jitter Attenuation Circuitry Output Buffer Output Bu.


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