MIC50396

MIC50395/50396/50397 www.DataSheet4U.com Micrel MIC50395/50396/50397 Six Decade Counter / Display Decoder Not Recommended for New Designs General Description The MIC50395 is an ion-implanted, P-channel MOS sixdecade synchronous up/down-counter/display driver with compare-register and storage-latches. The counter as well as the register can be loaded digit-by-digit with BCD data. The counter has an asynchronous-clear function. Scanning is controlled by the scan oscillator input which is self-oscillating or can be driven by an external signal. The six-decade register is constantly compared to the state of the six-decade counter and when both the register and the counter have the same content, an EQUAL signal is generated. The contents of the counter can be transferred into the 6-digit latch which is then multiplexed from MSD to LSD in BCD and 7-segment format to the output. The sevensegment decoder incorporates a leading-zero blanking circuit which can be disabled by an external signal. This device is intended to interface directly with the standard CMOS logic families. The MIC50396 and MIC50397 operate identically to the MIC50395 except that two digits in each were reprogrammed to provide divide by six circuitry instead of divide by ten. The MIC50396 is well suited for industrial timer applications while the MIC50397 is best suited for stop watch or real time computer clock applications. Features Single power supply Schmitt-Trigger on the count-in...