MCM72PB8ML

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 256K x 72 Bit BurstRAM Multichip Module The 256K x 72 multichip module uses four 4M bit synchronous fast static RAMs designed to provide a burstable, high performance, secondary cache for the PowerPC™ and other high performance microprocessors. It is organized as 256K words of 72 bits each. This device integrates input registers, an output register (MCM72PB8ML only), a 2–bit address counter, and high speed SRAM onto a single monolithic circuit for reduced parts count in cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the overall power consumption of the integrated functions for greater reliability. Addresses (SA), data inputs (DQx), and all control signals except output enable (G) and linear burst order (LBO) are clock (K) controlled through positive– edge–triggered noninverting registers. Bursts can be initiated with either ADSP...