MCF51QE128

Freescale Semiconductor Data Sheet: Technical Data Document Number: MCF51QE128 Rev. 7, 10/2008 MCF51QE128 Series Covers: MCF51QE128, MCF51QE32 MCF51QE96, MCF51QE64, MCF51QE128 80-LQFP Case 917A 14 mm2 64-LQFP Case 840F 10 mm2 32-Bit Version 1 ColdFire® Central Processor Unit (CPU) – Up to 50.33-MHz ColdFire V1 CPU above 2.4V, 40-MHz CPU above 2.1V, and 20-MHz CPU above 1.8V, across temperature range – Provides 0.94 Dhrystone 2.1 MIPS per MHz performance when running from internal RAM www.DataSheet4U.com (0.76 DMIPS/MHz from flash) – Implements Instruction Set Revision C (ISA_C) – Support for up to 30 peripheral interrupt requests and seven software interrupts On-Chip Memory – Flash read/program/erase over full operating voltage and temperature – Random-access memory (RAM) – Security circuitry to prevent unauthorized access to RAM and flash contents Power-Saving Modes – Two low power stop modes; reduced power wait mode – Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode – Very low power external oscillator can be used in stop3 mode to provide accurate clock to active peripherals – Very low power real time counter for use in run, wait, and stop modes with internal and external clock sources – 6 μs typical wake up time from stop modes Clock Source Options – Oscillator (XOSC) — Loop-control Pierce oscillator; Crystal or ceramic resonator range of 31.25 kHz to ...