MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal Bus Buffer
Inverting
The MC74VHC540 is an advanced high speed CMOS inverti...
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal Bus Buffer
Inverting
The MC74VHC540 is an advanced high speed
CMOS inverting octal bus buffer fabricated with silicon gate
CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation. The MC74VHC540 features inputs and outputs on opposite sides of the package and two AND–ed active–low output enables. When either OE1 or OE2 are high, the terminal outputs are in the high impedance state. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems. High Speed: tPD = 3.7ns (Typ) at VCC = 5V Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2V to 5.5V Operating Range Low Noise: VOLP = 1.2V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V Chip Complexity: 124 FETs or 31 Equivalent Gates
MC74VHC540
DW SUFFIX 20–LEAD SOIC PACKAGE CASE 751D–04
DT SUFFIX 20–LEAD TSSOP PACKAGE CASE 948E–02
M SUFFIX 20–LEAD SOIC EIAJ PACKAGE CASE 967–01 ORDERING INFORMATION MC74VHCXXXDW SOIC MC74VHCXXXDT TSSOP MC74VHCXXXM SOIC EIAJ
LOGIC DIAGRAM
A1 A2 A3 A4 A5 A6 A7 A8 OU...