MC74HC373A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal 3-State Non-Inverting Transparent Latch High–Performance Silicon–Gate CMOS The MC54/74HC373A is identical in pinout to the LS373. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched. The Output Enable input does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the high–impedance state. Thus, data may be latched even when the outputs are not enabled. The HC373A is identical in function to the HC573A which has the data inputs on the opposite side of the package from the outputs to facilitate PC board layout. The HC373A is the non–inverting version of the HC533A. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 186 FETs or 46.5 Equivalent Gates LOGIC DIAGRAM D0 D1 D2 DATA INPUTS D3 D4 D5 D6 D7 3 4 7 8 13 14 17 18 2 5 6 9 12 15 16 19 Q0 Q1 Q2 MC54/74HC373A J SUFFIX CERAMIC PACKAGE CASE 732–03 1 20 20 1 20 1 N SUFFIX PLASTIC PACKAGE CASE 738–03 DW SUFFIX SOIC PACKAGE CASE...