MC68307V

MOTOROLA (Parts Not Suitable for New Designs) Order this document by MC68307/D SEMICONDUCTOR TECHNICAL INFORMATION MC68307 MC68307V Technical Summary Integrated Multiple-Bus Processor The MC68307 is an integrated processor combining a static 68EC000 processor with multiple interchip bus interfaces. The MC68307 is designed to provide optimal integration and performance for applications such as digital cordless telephones, portable measuring equipment, and point-of-sale terminals. By providing 3.3 V, static operation in a small package, the MC68307 delivers cost-effective performance to handheld, batterypowered applications. The MC68307 (shown in Figure 1) contains a static EC000 core processor, multiple bus interfaces, a serial channel, two timers, and common system glue logic. The multiple bus interfaces include: dynamic 68000 bus, 8051 bus, and Motorola bus (M-bus) or I2C bus1. The dynamically sized 68000 bus allows 16-bit performance out of static random access memory (SRAM) while still providing a low-cost interface to an 8-bit read-only memory (ROM). The 8051 bus interfaces gluelessly to 8051-type devices and allows the reuse of applicationspecific integrated circuits (ASICs) designed for this industry standard bus. The M-bus is an industry standard 2-wire interface which provides efficient communications with peripherals such as EEPROM, analog/digital (A/ D) converters, and liquid crystal display (LCD) drivers. Thus, the MC68307 interfaces gluelessly to boot ROM, ...