MC56F8322

56F8322/56F8122 Data Sheet Preliminary Technical Data 56F8300 16-bit Hybrid Controllers MC56F8322 Rev. 10.0 10/2004 freescale.com Document Revision History Version History Rev 1.0 Rev 2.0 Rev 3.0 Description of Change Pre-Release version, Alpha customers only Initial Public Release Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar issues Added Package Pins to GPIO table in Section 8. Clarification of TRST usage in this device. Replacing TBD Typical Min with values in Table 10-17. Editing grammar, spelling, consistency of language throughout family. Updated values in Regulator Parameters, Table 10-9, External Clock Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters, Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25 Updated values in Power-On Reset Low Voltage Table 10-6. Added Section 4.8 , added addition text to Section 6.9 on POR reset, added the word “access” to FM Error Interrupt in Table 4-3, removed min and max numbers; only documenting Typ. numbers for LVI in Table 10-6. Updated numbers in Table 10-7 and Table 10-8 with more recent data, Corrected typo in Table 10-3 in Pd characteristics Replace any reference to Flash Interface Unit with Flash Memory Module; corrected typo on page 1 for ADC channel; changed example in Section 2.2 ; added note on VREFHand VREFLO in Table 2-2 and Table 11-1; corrected typo FIVAL1 and FIVAH1 in Table 4-12; removed unneccessary notes in Table 10-12; ...