MC10H176

www.DataSheet4U.com MC10H176 Hex D Master−Slave Flip−Flop Description The MC10H176 contains six master slave type D flip−flops with a common clock. This MECL 10H™ part is a functional/pinout duplication of the standard MECL 10K™ family part, with 100% improvement in clock frequency and propagation delay and no increase in power−supply current. Features http://onsemi.com MARKING DIAGRAMS* 16 MC10H176L AWLYYWW CDIP−16 L SUFFIX CASE 620A 1 Propagation Delay, 1.7 ns Typical Power Dissipation, 460 mW Typical Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) Voltage Compensated MECL 10K Compatible Pb−Free Packages are Available* 16 16 1 PDIP−16 P SUFFIX CASE 648 1 MC10H176P AWLYYWWG CLOCKED TRUTH TABLE C L H* H* Q X L H Qn+1 Qn L H * A clock H is a clock transition from a low to a high state. 10H176 ALYWG DIP PIN ASSIGNMENT VCC1 Q0 Q1 Q2 D0 D1 D2 VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 Q5 Q4 Q3 D5 D4 D3 CLOCK SOEIAJ−16 CASE 966 1 20 20 1 PLLC−20 FN SUFFIX CASE 775 A WL, L YY, Y WW, W G 10H176G AWLYYWW = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package Pin assignment is for Dual−in−Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). *For additional marking information, refer to Application Note AND8002/D. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and...