MC10231

MOTOROLA SEMICONDUCTOR TECHNICAL DATA High Speed Dual Type D Master-Slave Flip-Flop The MC10231 is a dual master–slave type D flip–flop. Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip–flop may be clocked separately by holding the common clock in the low state and using the enable inputs for the clocking function. If the common clock is to be used to clock the flip–flop, the Clock Enable inputs must be in the low state. In this case, the enable inputs perform the function of controlling the common clock. The output states of the flip–flop change on the positive transition of the clock. A change in the information present at the data (D) input will not affect the output information at any other time due to master–slave construction. PD = 270 mW typ/pkg (No Load) tpd = 2 ns typ tTog= 225 MHz typ tr, tf = 2.0 ns typ (20%–80%) LOGIC DIAGRAM S1 5 D1 7 CE1 6 R1 4 CC 9 R2 13 Q1 2 Q1 3 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 CE...