MB87M2141

Product Profile MB87M2141 INTRODUCTION: The SmartMPEGTM is an integrated set-top-box decoder. As a major component of a digital video broadcast (DVB) set-top-box or IDTV this device uses Fujitsu’s industry-leading Cx81 CMOS technology (0.18µm). It incorporates an ARC Tangent A4 RISC core (@130MHz), two transport stream demultiplexers with integrated DVB descramblers, a PAL/NTSC digital video encoder and a display controller, which overlays up to four layers of OSD. This set-top-box decoder consists of a shared memory interface for CPU and for MPEG decoding. The universal processor interface allows connection to FLASH, hard disk drives and other asynchronous devices. The minimum SDRAM required is one 64Mbit device using 16bit data bus. The SmartMPEGTM is the 3rd generation of Fujitsu’s MPEG decoder, the successor to the MB87L2250. With the MB87L2250, Fujitsu offered a set-top-box chip, which enabled very low end product cost. Its successor, the SmartMPEGTM incorporates all the features which are required for standard set-top-boxes. This high level of integration makes it ideally suited for todays interactive set-top-box applications. Furthermore the Fujitsu Application Programming Interface (FAPI) ensures a short time-to-market by making the software development easier. The FAPI is the programming interface for Fujitsu DVB components as well as easing migration to future devices. S h a re d M e m o r y SmartMPEGTM FEATURES ...