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MB82DS01181E Datasheet

Part Number MB82DS01181E
Manufacturers Fujitsu Media Devices
Logo Fujitsu Media Devices
Description Mobile Phone Application Specific Memory
Datasheet MB82DS01181E DatasheetMB82DS01181E Datasheet (PDF)

www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS05-11434-1E MEMORY Mobile FCRAMTM CMOS 16 Mbit (1 M word × 16 bit) MB82DS01181E-70L-A ■ DESCRIPTION Mobile Phone Application Specific Memory MB82DS01181E is a Fast Cycle Random Access Memory (FCRAM) with asynchronous Static Random Access Memory (SRAM) interface containing 16,777,216 storages accessible in a 16-bit format. MB82DS01181E is suited for mobile applications such as Cellular Handset and PDA. Note: FCRAM is a trademark of Fuji.

  MB82DS01181E   MB82DS01181E






Mobile Phone Application Specific Memory

www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS05-11434-1E MEMORY Mobile FCRAMTM CMOS 16 Mbit (1 M word × 16 bit) MB82DS01181E-70L-A ■ DESCRIPTION Mobile Phone Application Specific Memory MB82DS01181E is a Fast Cycle Random Access Memory (FCRAM) with asynchronous Static Random Access Memory (SRAM) interface containing 16,777,216 storages accessible in a 16-bit format. MB82DS01181E is suited for mobile applications such as Cellular Handset and PDA. Note: FCRAM is a trademark of Fujitsu Limited, Japan. ■ FEATURES • • • • • • • • • • • Asynchronous SRAM Interface 1 M word × 16-bit Organization Low-voltage Operating Conditions Wide Operating Temperature Read/Write Cycle Time Fast Random Access Time Active current Standby current Power down current Byte Control Shipping Form : VDD = +1.7 V to +1.95 V : TA = −30 °C to +85 °C : tRC = tWC = 80 ns Min : tAA = tCE = 70 ns Max : IDDA1 = 20 mA Max : IDDS1 = 100 µA Max : IDDPS = 10 µA Max : Wafer / Chip MB82DS01181E-70L-A ■ PIN DESCRIPTION Pin Name A19 to A0 CE1 CE2 WE OE LB UB DQ8 to DQ1 DQ16 to DQ9 VDD VSS Address Input Chip Enable 1 (Low Active) Chip Enable 2 (High Active) Write Enable (Low Active) Output Enable (Low Active) Lower Byte Control (Low Active) Upper Byte Control (Low Active) Lower Byte Data Input/Output Upper Byte Data Input/Output Power Supply Ground Description 2 MB82DS01181E-70L-A ■ BLOCK DIAGRAM VDD VSS A19 to A0 Address Latch & Buffer Row Decoder Memory Cell Array 16,777,216 bits DQ8 to DQ1 I/.


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