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MACH220-10

Lattice

High-Density EE CMOS Programmable Logic


Description
FINAL COM’L: -10/12/15/20 IND: -14/18/24 MACH220-10/12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 96 Macrocells 10 ns tPD 100 MHz fCNT 56 Inputs with pull-up resistors 48 Outputs Lattice Semiconductor 96 Flip-flops; 4 clock choices 8 “PAL26V12” blocks with buried macrocells Pin-compatible with MACH120 and MACH221 ...



Lattice

MACH220-10

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