M74HC4049

M54/74HC4049 M54/74HC4050 HC4049 HEX BUFFER/CONVERTER (INVERTER) HC4050 HEX BUFFER/CONVERTER . . . . . . . . HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 4049B/4050B B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HCXXXXF1R M74HCXXXXM1R M74HCXXXXB1R M74HCXXXXC1R PIN CONNECTIONS (top view) HC4049 DESCRIPTION The M54/74HC4049 and the M54/74HC4050 are high speed CMOS HEX BUFFER fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. The M54/75HC4049 is an inverting buffer, while the M54/74HC4050 is a non-inverting buffer. The internal circuit is composed of 3 stage or 2stage inverters, which provides high noise immunity and a stable output. Input protection circuits are different from those of the high speed CMOS IC’s. The VCC side diodes are designed to allow logiclevel convertion from high-level voltages (up to 15 V) to low-level voltages. March 1993 NC = No Internal Connection HC4050 1/11 M54/M74HC4049/4050 CIRCUIT SCHEMATIC (Per Gate) HC4049 HC4050 CHIP CARRIER HC4049 HC4050 NC =No Internal Connection TRUTH TA...