M74HC161
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
s HIGH SPEED :
fMAX = 62 MHz (TYP.) at VCC = 6V
s LOW POWER DISSIPATI...
M74HC161
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
s HIGH SPEED :
fMAX = 62 MHz (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC =4µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
)VNIH = VNIL = 28 % VCC (MIN.) t(ss SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
ucs BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ros WIDE OPERATING
VOLTAGE RANGE: PVCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
te74 SERIES 161
oleDESCRIPTION
sThe M74HC161 is an high speed
CMOS
bSYNCHRONOUS
4-BIT
BINARY
OPRESETTABLE COUNTER fabricated with silicon -gate C2MOS technology.
t(s)The CLOCK input is active on the rising edge.
Both LOAD and CLEAR inputs are active LOW.
cPresetting is synchronous on the rising edge of
uthe clock, the function is cleared asynchronously.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP SOP TSSOP
M74HC161B1R M74HC161M1R
T&R
M74HC161RM13TR M74HC161TTR
Two enable inputs (TE and PE) and CARRY output are provided to enable easy cascading of counters, which facilities easy implementation of N-bit counters without using external gates. All inputs are equipped with protection circuits against static discharge and transient excess
voltage.
Obsolete ProdPIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/12
M74HC161
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL NAME AND FUNCTION
1
CLEAR
Asynchronous Master Reset
2
CLOCK
Clock Input (LOW to HIGH, Edge-triggered)
3, 4, 5, 6 A, B, C, D Data Inputs
7 PE Count Enable Input
10 TE Coun...