M66252P

MITSUBISHI MITSUBISHI 〈DIGITAL 〈DIGITAL ASSP ASSP 〉 〉 M66252P/FP M66252P/FP 1152 x 8-BIT LINE MEMORY (FIFO) 1152 x 8-BIT LINE MEMORY (FIFO) DESCRIPTION The M66252P/FP is a high-speed line memory with a FIFO (First In First Out) structure of 1152-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology. It has separate clock, enable and reset signals for write and read and is most suitable as a buffer memory between devices with different data processing throughput. FEATURES Memory construction ........................................................ ............................. 1152words x 8bits (dynamic memory) High-speed cycle ............................................ 50ns (min.) High-speed access ........................................ 40ns (max.) Output hold ....................................................... 5ns (min.) Fully independent, asynchronous write and read operations Variable-length delay bit Output .................................................................... 3-state APPLICATION Digital photocopiers, high-speed facsimiles, laser beam printers. PIN CONFIGURATION (TOP VIEW) Q0 Q1 Data output Q2 Q3 Read enable input RE Read reset input RRES GND Read clock input RCK Q4 Q5 Data output Q6 Q7 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 D0 D1 D2 D3 WE WRES VCC WCK D4 D5 D6 D7 Data input Outline 24P4Y 24P2W-A M66252P/FP Write enable input Write reset input Write clock input D...